This invention relates more particularly to built-in self test circuitry for integrated circuits and more particularly to an integrated circuit chip of digital microelectronic circuits or a multi-chip module that is encapsulated in packaging material and which incorporates its own internal built-in self test circuit for providing a visual feedback to a tester through the packaging material that the integrated circuit chip or multi-chip module has failed.
Currently integrated circuit chips including digital microelectronic circuits that are manufactured from new designs typically allocate one pin or several pins for test control, test simulation and test result collection. The chip is analyzed through the use of special external equipment or on-board electronics to determine that the circuit under test is operating correctly or incorrectly. In any case, there is no direct feedback, except through test equipment or on-board circuitry, that is provided to the individual testing or using the particular chip or multi-chip module that a chip failure has occurred, even though the built-in test equipment has determined that the chip(s) is not functioning properly.
Accordingly, it is an object of the present invention to provide an improvement in means for testing electronic circuitry.
It is another object of the invention to provide a testing circuit that will provide a visual feedback to the tester that the circuit under test has failed.
It is a further object of the invention to provide an internal built-in self test circuit and indicator that provides an immediate visual cue to an individual testing or operating the chip or module that it is no longer passing its own internal built-in test procedure and therefore is inoperable.